MS/RF | Portfolio | Technology

MS/RFMixed Signal / Radio Frequency

Seamless Harmony of MS/RF Processes

DB HiTek’s 0.11μm to 90nm MS (Mixed Signal) processes feature world-class low-noise performance and are optimized for applications such as audio codecs, touch sensor controllers, and sensor ROICs. In addition, DB HiTek offers low-noise devices, thin-film resistors, and high-gain BJTs to enhance product performance. With over 10 years of mass production experience, the company consistently maintains excellent and stable yield through robust process control.

The RF (Radio Frequency) process provides a variety of design options for RF products based on customer needs, including Bulk (10Ω), HRS (high resistivity substrate, over 1kΩ), and SOI (silicon on insulator). It also enables optimal selection by balancing cost efficiency and performance characteristics for RF front-end applications such as TV tuners, Bluetooth modules, switches, and LNAs.

Process

Innovative MS/RF Design Support

90nm Digital + Analog: 90nm channel length with 0.11um shrunk BEOL Support Various Vop (1.2V, 3.3V, 5V) PNO gate oxide is used for lower 1/f noise characteristics than TS11 process
(TS09 Process) eNVM : ~128Kbit Anti fuse (eMemory) Digital IP/Lib : Multi Vth Std. Cell Lib, IO Lib, Memory Compiler SPICE model including Mismatch & Noise, Cadence PDK

0.11um Digital + Analog: 0.13um channel length with 0.11um shrunk BEOL Support Various Vop (1.2V, 1.5V, 2.5V, 3.3V, 5V) ULP (Ultra Low LKG + Low Noise + Low Op.)
(TS11 Process) Optical Shrink Process (90%) of 0.13um Foundry General Process eNVM : ~32bit Poly fuse, ~512Kbit EPROM (eMemory), ~128Kbit Anti fuse (Kilopass) Digital IP/Lib : Multi Vth Std. Cell Lib, IO Lib, Memory Compiler SPICE model including Mismatch & Noise, Cadence PDK

(ULP11 Process) Focus on Low Power + Ultra Low Leakage + Low Power Operation, Able to Minimize both Active Power Consumption and Leakage in off-status in one technology PNO gate oxide is used for lower 1/f noise 1.5V Low Power & 1.2V Ultra Low LKG.

0.11μm RF Bulk CMOS: RF process compatible with optical Shrink Process (90%) of 0.13um Foundry General Process Substrate resistivity: 10ohm-cm Up to 1Poly 5~8Metal process (with UTM) Fully Characterized PDK and Industry Standard CAD Tools Inductor : Standard, Symmetric, Symmetric with Center tap.

0.11μm RF HRS CMOS: RF process (1.2V / 2.5V) compatible with optical Shrink Process (90%) of 0.13um Foundry General Process Substrate resistivity: 1kohm-cm Up to 1Poly 5Metal process (with UTM), 1Poly 2~3Metal + 1~2 UTM (Four configuration) Fully Characterized PDK and Industry Standard CAD Tools Inductor

0.13μm RF SOI CMOS: Single (2.5V) for switch or dual gate oxide process (1.2V / 2.5V) for LNA 5V CMOS + 5V LDMOS for one chip solution (Controller/PA/LNA) - ’26, Apr. Substrate: Trap-rich SOI Up to 1Poly 5Metal process (with UTM), 1Poly 2~3Metal + 1~2 UTM (Four configuration) Fully Characterized PDK and Industry Standard CAD Tools Inductor

Application-Specific
Solutions

DB HiTek’s RF process is driven by advanced technology optimized for the rapidly growing markets in 5G communication, Wi-Fi, IoT, and UWB, with plans to offer 5V CMOS and 5V LDMOS devices for one-chip solutions.